SystemVerilog (IEEE 1800-2017) Simulator
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Matched by dependency overlap in Cargo manifests — each card notes the most distinctive crates both projects share.
SystemVerilog (IEEE 1800-2017) Simulator
Minimal examples of crates useful for compiler development
Cranelift based backend for rustc
A high-performance, next-generation Haxe compiler with tiered JIT compilation and native code generation
Multi-Paradigm Compiler Infrastructure & Runtime Framework
The open-source decision platform — author, test, and govern business rules at scale built in Rust
An embedded scheme interpreter in Rust
A statically-typed and expression-oriented programming language for developer productivity.
A lightweight WebAssembly runtime that is fast, secure, and standards-compliant